ADN4665 Datasheet | Analog Devices

.. 3 V, LVDS, Quad, CMOS Differential Line Driver ADN4665 FUNCTIONAL BLOCK DIAGRAM DIN1 D1 DOUT1+ DOUT1- EN D4 DOUT4+ DOUT4- EN DOUT3- DOUT3+ D2 DIN2 GND D3 08085-001 Features ±15 kV ESD protection on output pins 400 Mbps (200 MHz) switching rates 100 ps typical differential skew 400 ps maximum differential skew 2 ns maximum propagation delay 3.3 V power supply ±350 mV differential signaling Low power dissipation (13 mW typical) Interoperable with existing 5 V LVDS receivers High impedance on LVDS outputs on power-down Conforms to TIA/EIA-644 LVDS standards Industrial operating temperature range: - 40°C to +85°C Available in surface-mount SOIC package and low...